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4-bit Arithmetic-Logic Unit (ALU)

Design and construct an Arithmetic-Logic unit that contains a 4-bit register (R). The input to the unit shall be a 4-bit word (X) (in the sign-magnitude format if it represents a number) and a 3-bit control code (C). The unit shall perform the following operations:

 

OperationRegister Transfer

Load (LD)R ← X

Clear (CLR)R ← 0000

Set (SET)R ← 1111

Add (ADD)R ← R + X

Subtract (SUB)R ← R – X

Complement (NOT)R ← R

AND (AND)R ← R ∧ X

OR (OR)R ← R ∨ X

XOR (XOR)R ← R ⊕ X

Shift Right (SR)R ← |0 R(3:1)|

Shift Left (SL)R ← |R(2:0) 0|

Barrel Shift (BS)R ← | R(0) R(3:1)|

No Operation (NOP)R ← R

 

The unit shall display the contents of the storage register (R) on binary displays. Also indicate the register-overflow condition. If the contents of the storage register is a number, it shall be in the sign-magnitude format. The machine operation shall be initiated by a pushbutton “clock.”

 

The operations may be performed by hardware or by software operations if more appropriate. If an operation is performed by a software operation, write and test the machine language program that accomplishes the operation.

 

Write and test machine language programs that multiply positive numbers by 2 and 3. In each case a single number shall be entered as the multiplicand.

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Uploaded on April 28, 2008
Taken on April 27, 2008