Olympus optical detector systeem 2013.
Olympus optical detector systeem 2013.
This is a new version of the optical detector. There is another line array used with 400 dpi. As a result, the detection resolution doubles. The used line array is TSL1401CL. There are some advantages in relation to the previous line array. The integration time is the same for all pixels. The light charges are transferred once at the start of the readout for all 128 pixels. This array is faster but now has only 1 output line. All 128 pixels must now be read out serially to the same pin, the foregoing could be read via 2 outputs. But this array is faster so the shortest integration time remains low. The ADC converters should now be faster. The new version with the ADC7885 now has a bandwidth of 30 MHz and a serial clock to 48 MHz. I now use 2 of these converters via serial time multiplexing.
The line array has 400 dpi versus 200 dpi of the TSL202R. The optical lenght pad is now only the half. The detector has double resolution in depth, a great feature for macro closeup. 1 pixel shift is now only 0.4mm depth at 500 mm distance. At closer settings this value is proportionally smaller.
The full timing diagram to readout this line array is show at:
www.flickr.com/photos/fotoopa_hs/8093622277/
Not easy, but nice job for the FPGA controller. The timing is show for an 40 MHz PLL clock but this may be higher if need to 64 Mhz or even 96 Mhz. The TSL1401CL is a very small SMD version. I will show later how to put him on the single layer PCB board.
Olympus optical detector systeem 2013.
Olympus optical detector systeem 2013.
This is a new version of the optical detector. There is another line array used with 400 dpi. As a result, the detection resolution doubles. The used line array is TSL1401CL. There are some advantages in relation to the previous line array. The integration time is the same for all pixels. The light charges are transferred once at the start of the readout for all 128 pixels. This array is faster but now has only 1 output line. All 128 pixels must now be read out serially to the same pin, the foregoing could be read via 2 outputs. But this array is faster so the shortest integration time remains low. The ADC converters should now be faster. The new version with the ADC7885 now has a bandwidth of 30 MHz and a serial clock to 48 MHz. I now use 2 of these converters via serial time multiplexing.
The line array has 400 dpi versus 200 dpi of the TSL202R. The optical lenght pad is now only the half. The detector has double resolution in depth, a great feature for macro closeup. 1 pixel shift is now only 0.4mm depth at 500 mm distance. At closer settings this value is proportionally smaller.
The full timing diagram to readout this line array is show at:
www.flickr.com/photos/fotoopa_hs/8093622277/
Not easy, but nice job for the FPGA controller. The timing is show for an 40 MHz PLL clock but this may be higher if need to 64 Mhz or even 96 Mhz. The TSL1401CL is a very small SMD version. I will show later how to put him on the single layer PCB board.