Back to photostream

MV/7800 CPU

I had a new macro lens and I just started playing around with it. This is the CPU chipset plus memory controller from a Data General MV/7800 minicomputer (c. 1986)

 

So it had a “System Processing Unit” which consisted of 3 NMOS chips:

Microsequencer

CPU

FPU

Cycle time was 320 ns (I think that’s 3MHz)

 

I/O controller for Burst Multiplexor Channel (BMC) in CMOS – that would be the one w/o the heatsink. This was basically the interface for disk.

I/O controller for data channel and programmed I/O (NMOS) This was the interface used by networking cards and the like.

Memory controller was an ECL chip from Moto.

 

The system had 2MB or 4MB options for on-board memory.

 

660 views
0 faves
5 comments
Uploaded on February 15, 2007
Taken on February 11, 2007