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NXP PNX5100 HD Post-Processing Engine Die Shot
Die shot of the PNX5100 Post-Processing Video engine. This chip is designed to be a video enhancement processor for older generations of high-end TVs around 2008. It takes in LVDS from the TVs main SOC (typically a PNX8535), and outputs digitally enhanced LVDS for the Tcon chip to display onto the screen. This chip contains 3 trimedia TM3271 VLIW CPU cores for handling processing intensive video enhancements, which NXP calls computing engines. The first TM3271 core handles the general control of the SOC, and auto picture control. The second two cores work together the perform Frame Rate Conversion. One of the core handles motion estimation, vector processing, and detects the film mode. The last core up-converts the video to 120hz, and detects static regions in video. The PNX5100 interfaces with DDR2 memory and is built on the 90nm process. This chip specifically targets frame rate conversion, which greatly improves motion and overall video quality. A detailed PowerPoint presentation which includes annotated top metal Die Shots, block diagrams and other information can be found here: www.alldatasheet.com/datasheet-pdf/download/1790800/PHILI...
The successor to this chip is the NXP PNX85500 SOC. This chip integrates everything within the PNX5100 plus the main tv SOC into a single chip. Unfortunately, my efforts to locate and purchase one of these has not been successful. A PowerPoint presentation is also available for this chip is available, and it does include a low resolution polysilicon die shot which can be found here: old.hotchips.org/wp-content/uploads/hc_archives/hc21/3_tu...
The full video archive of the 2009 Hot Chips presentation, which discusses this chip, can be found here: www.youtube.com/watch?v=ZYDTl9W7bx4
NXP PNX5100 HD Post-Processing Engine Die Shot
Die shot of the PNX5100 Post-Processing Video engine. This chip is designed to be a video enhancement processor for older generations of high-end TVs around 2008. It takes in LVDS from the TVs main SOC (typically a PNX8535), and outputs digitally enhanced LVDS for the Tcon chip to display onto the screen. This chip contains 3 trimedia TM3271 VLIW CPU cores for handling processing intensive video enhancements, which NXP calls computing engines. The first TM3271 core handles the general control of the SOC, and auto picture control. The second two cores work together the perform Frame Rate Conversion. One of the core handles motion estimation, vector processing, and detects the film mode. The last core up-converts the video to 120hz, and detects static regions in video. The PNX5100 interfaces with DDR2 memory and is built on the 90nm process. This chip specifically targets frame rate conversion, which greatly improves motion and overall video quality. A detailed PowerPoint presentation which includes annotated top metal Die Shots, block diagrams and other information can be found here: www.alldatasheet.com/datasheet-pdf/download/1790800/PHILI...
The successor to this chip is the NXP PNX85500 SOC. This chip integrates everything within the PNX5100 plus the main tv SOC into a single chip. Unfortunately, my efforts to locate and purchase one of these has not been successful. A PowerPoint presentation is also available for this chip is available, and it does include a low resolution polysilicon die shot which can be found here: old.hotchips.org/wp-content/uploads/hc_archives/hc21/3_tu...
The full video archive of the 2009 Hot Chips presentation, which discusses this chip, can be found here: www.youtube.com/watch?v=ZYDTl9W7bx4